1. Field of Invention
The present invention relates to a display, and more particularly relates to a source driver of the display.
2. Description of Related Art
In order to avoid image sticking, the polarity of each pixel of the display should not be consistent for a long time. There are many kinds of polarity distribution, for example the one-dot-line inversion shown in FIG. 1A. The display operates according to data lines S1˜S8 and gate lines G1˜G8. The symbol ‘+’ represents the pixel has a positive polarity, and the symbol ‘−’ represents the pixel has a negative polarity.
FIG. 1B is a block diagram of a source driver for the display. The source driver has a sample/hold circuit 110, multiplexers (MUX) 150a, 150b and 160, a low voltage operational amplifier (LV OPA) 130, and a high voltage operational amplifier (HV OPA) 140, for driving data lines, for example S1 and S2.
The sample/hold circuit 110 receives a positive polarity voltage VA+ and a negative polarity voltage VA− of a first signal for outputting a first sampled-held voltage SH1 and a second sampled-held voltage SH2. And, the sample/hold circuit 110 receives a positive polarity voltage VB+ and a second polarity voltage VB− of a second signal for outputting a third sampled-held voltage SH3 and a fourth sampled-held voltage SH4.
The low voltage operational amplifier 130 amplifies the first sampled-held voltage SH1 or the third sampled-held voltage SH3 selectively output by the multiplexer 150a and outputs a low pixel voltage LP with a negative polarity. The high voltage operational amplifier 140 amplifies the second sampled-held voltage SH2 or the fourth sampled-held voltage SH4 selectively output by the multiplexer 150b to output a high pixel voltage HP with a positive polarity. The multiplexer 160 output the low pixel voltage LP and the high pixel voltage HP to data lines S1 and S2 of the display according to the polarity signal POL.
The sample/hold circuit 110 has a first capacitor device 114a and a second capacitor device 118a to respectively deal with the positive polarity voltage VA+ and the negative polarity voltage VA− of the first signal. Moreover, the sample/hold circuit 110 has a third capacitor device 114b and a fourth capacitor device 118b to respectively deal with the positive polarity voltage VB+ and the negative polarity voltage VB− of the second signal. That is, the source driver needs at least four capacitor devices to drive two data lines.